Devices, methods, and articles of manufacture consistent with exemplary embodiments relate to an electronic circuit, and more particularly, to a digital phase-locked loop (DPLL), devices including the same, and a method of operating the same.
Phase-locked loops (PLLs) are usually used to generate a clock signal having a particular frequency. PLLs are divided into analog PLLs and digital PLLs. A DPLL has advantages of easy scaling and a small area but has disadvantages of high in-band noise and many spurious tones.